1. Technical field
Several aspects of the present invention relate to a semiconductor device and a method for manufacturing thereof.
2. Related Art
A field-effect transistor formed on an SOI structure has been drawing attention recently due to its usability in terms of easy element-isolation, no latch-up phenomenon, and small source/drain junction capacitance. Especially, a fully depleted silicon on insulator (SOI) transistor has been studied actively due to its capability of high-speed operation with low power consumption, and simplicity in low-voltage drive.
For example, T. Sakai et al., Second International SiGe Technology and Device Meeting, Meeting Abstract, pp. 230-231, May (2004) discloses a method for forming an SOI structure on a bulk wafer. First, the method forms a single-crystalline silicon-germanium layer and a single-crystalline silicon layer on a single-crystalline silicon substrate by epitaxial growth, and forms recesses on both ends of an element region, that is a region in which the SOI structure is to be formed. Next, an insulating layer formed over the whole surface of the substrate is patterned so as to provide a support supporting the element region to the substrate and formed through the recesses. Then the single-crystalline silicon-germanium layer is selectively etched by hydrofluoric nitric acid to form a cavity, providing a silicon on nothing (SON) structure. Then the single-crystalline silicon substrate and the single-crystalline silicon layer are thermally oxidized to grow silicon oxide films from the top and the bottom of the cavity, providing a buried insulating layer filling up the cavity. Thus, the SOI structure is provided. After the cavity is filled up with the buried insulating layer, the silicon oxide film and the support are planarized by chemical mechanical polishing (CMP), and the single-crystalline silicon layer in the region in which the SOI structure is to be formed is exposed by hydrofluoric acid solution.
However, in the above forming method, the support fixes two opposed sides of the region in which the SOI structure is to be formed, to the substrate, so that stress occurring within the support easily affects the single-crystalline silicon layer in the process of the thermal oxidation of the single-crystalline silicon substrate and the single-crystalline silicon layer. Especially, when compressive stress occurs, the support and the single-crystalline silicon layer warp upward, i.e. warp in a convex shape, so that a gap may be generated at the interface of the silicon oxide films growing from the top and the bottom of the cavity. Therefore, the hydrofluoric acid solution enters the gap in the process of CMP and the process of exposing the single-crystalline silicon layer, so that the single-crystalline silicon layer may be peeled off.
FIGS. 14A to 14C show generation of a gap in forming an SOI structure by the conventional method. FIG. 14A shows a state of a single-crystalline silicon substrate 102 subjected to the following process: forming a single-crystalline silicon-germanium layer which is not shown and a single-crystalline silicon layer 104 provided to a region on which the SOI structure is to be formed; covering the top surface of the single-crystalline silicon layer 104 by a support 108 of which both sides connect with the single-crystalline silicon substrate 102 through recesses 106 for a support so as to support the single-crystalline silicon layer 104; and selectively etching and removing the single-crystalline silicon-germanium layer so as to form a cavity 110 under the single-crystalline silicon layer 104. The removing process of the single-crystalline silicon-germanium layer generates no stress, so that the support 108 does not warp and the single-crystalline silicon layer 104 is flat.
FIG. 14B shows a state of starting thermal oxidation of the single-crystalline silicon layer 104 being the upper layer of the cavity 110 and the single-crystalline silicon substrate 102 being the lower layer of the cavity 110 so as to form a buried insulating layer composed of silicon oxide films in the cavity 110. As a silicon oxide film 112 and the silicon oxide film 113 grow from the above two opposing layers in the cavity, compressive stress 116 occurs within the support 108 by heat. Here, the both sides of the support 108 connect with the single-crystalline silicon substrate 102 through the recesses 106, so that the support 108 can not stretch in the horizontal direction. Further, the support 108 is individually formed, more easily transforming than the single-crystalline silicon substrate 102. Therefore, a force 118 is applied to the support 108 and the single-crystalline silicon layer 104 supported by the support 108 to release the compressive stress 116. Consequently, the support 108 and others start to warp upward, that is archwise.
FIG. 14C shows a state after the completion of the thermal oxidation. Since the support 108 and the single-crystalline silicon layer 104 are thermally oxidized in a manner warping upward, a gap 120 which is thin and arcuate is generated between the silicon oxide film 112 grown on the surface of the single-crystalline silicon layer 104 and the silicon oxide film 113 grown on the surface of the single-crystalline silicon substrate 102. Here, the original purpose is to form the buried insulating layer integrating the above two silicon oxide films. As mentioned later, in order to form the SOI structure, the support 108 is removed by chemical mechanical polishing (CMP) to expose the surface of the single-crystalline silicon layer 104. If hydrofluoric acid etchant enters the gap in the CMP process, the buried insulating layer may be etched to peel off the single-crystalline silicon layer 104 being the upper layer of the buried insulating layer.